Parametric real-time reasoning
STOC '93 Proceedings of the twenty-fifth annual ACM symposium on Theory of computing
Journal of the ACM (JACM)
Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Theoretical Computer Science
Symbolic model checking for real-time systems
Information and Computation
What's decidable about hybrid automata?
STOC '95 Proceedings of the twenty-seventh annual ACM symposium on Theory of computing
The benefits of relaxing punctuality
Journal of the ACM (JACM)
From Timed Automata to Logic - and Back
MFCS '95 Proceedings of the 20th International Symposium on Mathematical Foundations of Computer Science
Automata For Modeling Real-Time Systems
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Minimum and Maximum Delay Problems in Real-Time Systems
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Computing Accumulated Delays in Real-time Systems
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Symbolic Verification with Periodic Sets
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Multiple Counters Automata, Safety Analysis and Presburger Arithmetic
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Timing behavior analysis for real-time systems
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
On the Emptiness Problem for Two-Way NFA with One Reversal-Bounded Counter
ISAAC '02 Proceedings of the 13th International Symposium on Algorithms and Computation
Durations, Parametric Model-Checking in Timed Automata with Presburger Arithmetic
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
Reachability Analysis for Some Models of Infinite-State Transition Systems
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Decidable Approximations on Generalized and Parameterized Discrete Timed Automata
COCOON '01 Proceedings of the 7th Annual International Conference on Computing and Combinatorics
Liveness Verification of Reversal-Bounded Multicounter Machines with a Free Counter
FST TCS '01 Proceedings of the 21st Conference on Foundations of Software Technology and Theoretical Computer Science
Generalizing the Discrete Timed Automaton
CIAA '00 Revised Papers from the 5th International Conference on Implementation and Application of Automata
CIAA '01 Revised Papers from the 6th International Conference on Implementation and Application of Automata
Binary Reachability Analysis of Pushdown Timed Automata with Dense Clocks
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Proceedings of the 14th Annual Conference of the EACSL on Computer Science Logic
Removing All Silent Transitions from Timed Automata
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Quantitative robustness analysis of flat timed automata
FOSSACS'11/ETAPS'11 Proceedings of the 14th international conference on Foundations of software science and computational structures: part of the joint European conferences on theory and practice of software
Thin and thick timed regular languages
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Flat acceleration in symbolic model checking
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Quantifying similarities between timed systems
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
On sampled semantics of timed systems
FSTTCS '05 Proceedings of the 25th international conference on Foundations of Software Technology and Theoretical Computer Science
The power of hybrid acceleration
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Multi-core reachability for timed automata
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
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A configuration of a timed automaton is given by a control state and finitely many clock (real) values. We show here that the binary reachability relation between configurations of a timed automaton is definable in an additive theory of real numbers, which is decidable. This result implies the decidability of model checking for some properties which cannot be expressed in timed temporal logics and provide with alternative proofs of some known decidable properties. Our proof relies on two intermediate results: 1. Every timed automaton can be effectively emulated by a timed automaton which does not contain nested loops. 2. The binary reachability relation for counter automata without nested loops (called here flat automata) is expressible in the additive theory of integers (resp. real numbers). The second result can be derived from [10].