Using Multiple Models for Debugging VHDL Designs

Authors:
Franz Wotawa
Affiliations:
-
Venue:
Proceedings of the 14th International conference on Industrial and engineering applications of artificial intelligence and expert systems: engineering of intelligent systems
Year:
2001

Citing 12
Cited 1

A theory of diagnosis from first principles

Artificial Intelligence
Diagnosing multiple faults

Artificial Intelligence
PELAS-Program Error-Locating Assistant System

IEEE Transactions on Software Engineering
Structure and chance: melding logic and probability for software debugging

Communications of the ACM
Aspect: detecting bugs with abstract dependences

ACM Transactions on Software Engineering and Methodology (TOSEM)
Model-based diagnosis of hardware designs

Artificial Intelligence
New directions in debugging hardware designs

IEA/AIE '99 Proceedings of the 12th international conference on Industrial and engineering applications of artificial intelligence and expert systems: multiple approaches to intelligent systems
Programmers use slices when debugging

Communications of the ACM
Current Directions in Automatic Test-Pattern Generation

Computer
Algorithmic Program DeBugging

Algorithmic Program DeBugging
Logic programs for consistency-based diagnosis

Logic programs for consistency-based diagnosis
Debugging functional programs

IJCAI'99 Proceedings of the 16th international joint conference on Artificial intelligence - Volume 2

On a Model-Based Design Verificationfor Combinatorial Boolean Networks

IEA/AIE '02 Proceedings of the 15th international conference on Industrial and engineering applications of artificial intelligence and expert systems: developments in applied artificial intelligence

Quantified Score

Hi-index	0.00

Visualization

Abstract

Debugging is a time-consuming task especially for larger programs written by a group of people. In this paper we describe the use of multiple models for debuggingVHDL designs, and presents some practical results. The models are derived from a general value-based model representing different fault situations that should be handled by a debugger. We propose the use of a probability-based selection strategy for selecting the most appropriate model in a given situation. For example large programs should be debugged using a model only distinguishing concurrent VHDL statements and not sequential statements. As a result of multimodel reasoning in this domain we expect performance gains allowing to debug larger designs in a reasonable time, and more expressive diagnosis results.