Design and validation of computer protocols
Design and validation of computer protocols
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Automatically closing open reactive programs
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Filter-based model checking of partial systems
SIGSOFT '98/FSE-6 Proceedings of the 6th ACM SIGSOFT international symposium on Foundations of software engineering
Verification experiments on the MASCARA protocol
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
A unified approach to global program optimization
POPL '73 Proceedings of the 1st annual ACM SIGACT-SIGPLAN symposium on Principles of programming languages
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Flow Analysis of Computer Programs
Flow Analysis of Computer Programs
Principles of Program Analysis
Principles of Program Analysis
Validating SDL Specifications: an Experiment
Proceedings of the IFIP WG6.1 Ninth International Symposium on Protocol Specification, Testing and Verification IX
Embedding a Dialect of SDL in PROMELA
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
Integrating Real Time into Spin: A Prototype Implementation
FORTE XI / PSTV XVIII '98 Proceedings of the FIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XI) and Protocol Specification, Testing and Verification (PSTV XVIII)
Formal Verification of SDL Systems at the Siemens Mobile Phone Department
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Synchronous Closing of Timed SDL Systems for Model Checking
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
State Space Reduction Based on Live Variables Analysis
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
SAS '01 Proceedings of the 8th International Symposium on Static Analysis
Verifying Large SDL-Specifications Using Model Checking
SDL '01 Proceedings of the 10th International SDL Forum Copenhagen on Meeting UML
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
IF: An Intermediate Representation and Validation Environment for Timed Asynchronous Systems
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
MOCHA: Modularity in Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
IF: A Validation Environment for Timed Asynchronous Systems
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Modeling and Verification of Reactive Systems using Rebeca
Fundamenta Informaticae
Rebeca: theory, applications, and tools
FMCO'06 Proceedings of the 5th international conference on Formal methods for components and objects
Modeling and Verification of Reactive Systems using Rebeca
Fundamenta Informaticae
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Model checkers like Spin can handle closed reactive systems, only. Thus to handle open systems, in particular when using assume guarantee reasoning, we need to be able to close (sub-)systems, which is commonly done by adding an environment process. For models with asynchronous message-passing communication, however, modelling the environment as separate process will lead to a combinatorial explosion caused by all combinations of messages in the input queues.In this paper we describe the implementation of a tool which automatically closes DTPromela translations of SDL-specifications by embedding the timed chaotic environment into the system. To corroborate the usefulness of our approach, we compare the state space of models closed by embedding chaos with the state space of the same models closed with chaos as external environment process on some simple models and on a case study from a wireless ATM medium-access protocol.