Fault tolerant and fault testable hardware design
Fault tolerant and fault testable hardware design
Fault Injection Experiments Using FIAT
IEEE Transactions on Computers
FERRARI: A Flexible Software-Based Fault and Error Injection System
IEEE Transactions on Computers - Special issue on fault-tolerant computing
Concurrent Error Detection Using Watchdog Processors-A Survey
IEEE Transactions on Computers
Xception: A Technique for the Experimental Evaluation of Dependability in Modern Computers
IEEE Transactions on Software Engineering
Executable Assertions for Detecting Data Errors in Embedded Control Systems
DSN '00 Proceedings of the 2000 International Conference on Dependable Systems and Networks (formerly FTCS-30 and DCCA-8)
Experimental evaluation of the fail-silent behaviour in programs with consistency checks
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
MetaKernels and Fault Containment Wrappers
FTCS '99 Proceedings of the Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing
A Flexible Run-time Support for Distributed Dependable Hard Real-time Applications
ISORC '99 Proceedings of the 2nd IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
Algorithm-Based Fault Tolerance for Matrix Operations
IEEE Transactions on Computers
IEEE Transactions on Software Engineering
Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features
Journal of Electronic Testing: Theory and Applications
Error Detection Enhancement in PowerPC Architecture-based Embedded Processors
Journal of Electronic Testing: Theory and Applications
| Hi-index | 0.00 |
Abstract: Mainly for economic and maintainability reasons, more and more dependable real-time systems are built from Commercial Off-The-Shelf (COTS) components. To build these systems, a commonly-used assumption is that computers are fail-silent. The goal of our work is to determine the cover-age of the fail-silence assumption for computers executing a real-time run-time support built exclusively from COTS components, in the presence of physical faults. The evaluation of fail-silence has been performed on the HADES run-time support [1], aimed at executing distributed hard real-time dependable applications. The main result of the evaluation is a fail-silence coverage of 99.1%. Moreover, we evaluate the error detection mechanisms embedded in HADES according to a rich set of metrics, which provides guidance to choose the set of error detection mechanisms the best suited to the system needs (e.g. find the best trade-off between fail-silence coverage and overhead caused by error detection).