Hierarchical finite-state machines and their use for digital control
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Logic Synthesis for Control Automata
Logic Synthesis for Control Automata
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
An Evolutionary Algorithm for the Synthesis of RAM-Based FSMs
IEA/AIE '02 Proceedings of the 15th international conference on Industrial and engineering applications of artificial intelligence and expert systems: developments in applied artificial intelligence
Lightweight implementations of SHA-3 candidates on FPGAs
INDOCRYPT'11 Proceedings of the 12th international conference on Cryptology in India
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This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state assignment technique, based on fuzzy codes, that is combined with the replacement (encoding) of the FSM input vectors. It also shows how FSMs with dynamically modifiable functionality can be constructed and then implemented in commercially available FPGAs. The results of experiments have shown that FSMs with the proposed architecture can be implemented using less hardware resources, such as the number of FPGA configurable logic blocks (CLB), while at the same time extending their functional capabilities.