Structured design implementation: a strategy for implementing regular datapaths on FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Module compaction in FPGA-based regular datapaths
DAC '96 Proceedings of the 33rd annual Design Automation Conference
The Verilog hardware description language (4th ed.)
The Verilog hardware description language (4th ed.)
An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Generating Layouts for Self-implementing Modules
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
A Universal CLA Adder Generator for SRAM-Based FPGAs
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
A Universal Module Generator for LUT-Based FPGAs
RSP '99 Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping
A universal Pezaris array multiplier generator for SRAM-based FPGAs
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Direct mapping of RTL structures onto LUT-based FPGA's
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PuMA++: From Behavioral Specification to Multi-FPGA-Prototype
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
A New Placement Method for Direct Mapping into LUT-Based FPGAs
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
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Rapidly growing design complexities and short time-to-market demands strengthen the need for fast and efficient functional verification and rapid prototyping. In this paper we present CoMGen (Configurable Module Generator) which implements arbitrary components ranging from flattened gate-level to pre-described parameterizable module descriptions into Look-Up Table (LUT)-based Field Programmable Gate Arrays (FPGAs). CoMGen targets a wide variety of today's FPGAs and is based on generic LUT and flip-flop models. The module descriptions can be given in the popular hardware description language Verilog. Several tools exist for either only gate-level implementations or register transfer-level oriented module generation. CoMGen combines both while providing a fast, efficient and highly configurable mapping environment. It extends a universal module generator [1] in many terms. This paper provides a survey of CoMGen and its concept. The second part states very promising results for flattened gate-level netlists and gives an outlook on our current and future research.