Linear cryptanalysis method for DES cipher
EUROCRYPT '93 Workshop on the theory and application of cryptographic techniques on Advances in cryptology
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
On the Complexity of Matsui's Attack
SAC '01 Revised Papers from the 8th Annual International Workshop on Selected Areas in Cryptography
The First Experimental Cryptanalysis of the Data Encryption Standard
CRYPTO '94 Proceedings of the 14th Annual International Cryptology Conference on Advances in Cryptology
A Chosen-Plaintext Linear Attack on DES
FSE '00 Proceedings of the 7th International Workshop on Fast Software Encryption
Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis
IEEE Transactions on Computers
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Thispa per dealsw ith cryptographic concepts. It presents a hardware FPGA implementation of linear cryptanalysis of DES1. Linear cryptanalysis is the best attack known able to break DES faster than exhaustive search. Matsui's original attack [4, 5] could not be applied as such, and we had to implement a modified attack [1] to face hardware constraints. The resulting attack is less efficient than Matsui's attack, but fitsi n our hardware and breaksa DES key in 12-15 hourso n one single FPGA, therefore becoming the first practical implementation to our knowledge. As a comparison, the fastest implementation known so far used the idle time of 18 Intel Pentium III MMX, and broke a DES key in 4.32 days.Our fast implementation made it possible for us to perform practical tests, allowing a comparison with theoretical estimations.