IEEE/ACM Transactions on Networking (TON)
Random early detection gateways for congestion avoidance
IEEE/ACM Transactions on Networking (TON)
High-performance communication networks
High-performance communication networks
Start-time fair queueing: a scheduling algorithm for integrated services packet switching networks
IEEE/ACM Transactions on Networking (TON)
High-speed policy-based packet forwarding using efficient multi-dimensional range matching
Proceedings of the ACM SIGCOMM '98 conference on Applications, technologies, architectures, and protocols for computer communication
Low-cost scalable switching solutions for broadband networking: the ATLANTA architecture and chipset
IEEE Communications Magazine
Implementing scheduling algorithms in high-speed networks
IEEE Journal on Selected Areas in Communications
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The network service providers require cost-effective multi-service platforms that can meet their customer's diverse, dynamic, and demanding application requirements. Multi-service platforms require flexible, configurable, versatile, scalable, and multi-purpose VLSI solutions. The emerging ASIC solutions, for these applications, are appropriately termed Network Processors (NPs) or "systems on a chip." Many of the emerging NPs are limited to only processing cell/packet-based traffic with functionalities distributed over several chip components. Onex's intelligent TDM, ATM, Packet (iTAP驴) system can support TDM-based and cell/packet-based traffic on only two chip components. In this article, we provide a short background on the network processors followed by an overview of iTAP驴's system architecture. The iTAP驴's distributed dynamic bandwidth allocation mechanism will be described. A simulation model of some of the algorithms implemented in the iTAP驴 is also provided. Finally, we will state the concluding remarks and elaborate on the issues that require further investigation.