Testing and Characterizing Jitter in 100BASE-TX and 155.52 Mbit/S ATM Devices with a 1 Gsample/s AWG in an ATE System

A STAND-ALONE INTEGRATED TEST CORE FOR TIME AND FREQUENCY DOMAIN MEASUREMENTS

ITC '00 Proceedings of the 2000 IEEE International Test Conference

A SYNTHESIZABLE, FAST AND HIGH-RESOLUTION TIMING MEASUREMENT DEVICE USING A COMPONENT-INVARIANT VERNIER DELAY LINE

ITC '01 Proceedings of the 2001 IEEE International Test Conference

A STAND-ALONE INTEGRATED TEST CORE FOR TIME AND FREQUENCY DOMAIN MEASUREMENTS

ITC '01 Proceedings of the 2001 IEEE International Test Conference

BIST for Phase-Locked Loops in Digital Applications

ITC '99 Proceedings of the 1999 IEEE International Test Conference

A jitter characterization system using a component-invariant vernier delay line

IEEE Transactions on Very Large Scale Integration (VLSI) Systems