The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
The Need for Complete System Level Test Standardization
Proceedings of the IEEE International Test Conference on Test and Design Validity
Achieving Board-Level BIST Using the Boundary-Scan Master
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
System Level Interconnect Test in a Tristate Environment
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A Universal Framework for Managed Built-in Test
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Testing for Faults in Wiring Networks
IEEE Transactions on Computers
Modeling for structured system interconnect test
ITC'94 Proceedings of the 1994 international conference on Test
Testing and diagnosis of interconnects using boundary scan architecture
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
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With widespread acceptance of the IEEE 1149.1 Standard,structured interconnect testing has become extremelyimportant at the MCM, PWB and system levels. In the conventionalparadigm, an interconnect topology model of thesystem under test is extracted from design information.From this model, interconnect test patterns can be generatedby means of well understood algorithms. We demonstratea new approach whereby the interconnect topologymodel is extracted by directly probing a hardware prototypeof the system under test. This Golden Model can thenbe used to generate interconnect tests for other systemswhose interconnect topology matches that of the prototype.Algorithms for this Golden Model extraction are presentedand analyzed, empirical results are given, and the benefitsand drawbacks of the approach are discussed.