Hardware support for fast capability-based addressing
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Low Cost Attacks on Tamper Resistant Devices
Proceedings of the 5th International Workshop on Security Protocols
How to Implement Cost-Effective and Secure Public Key Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Tamper resistance: a cautionary note
WOEC'96 Proceedings of the 2nd conference on Proceedings of the Second USENIX Workshop on Electronic Commerce - Volume 2
Cryptography and competition policy: issues with 'trusted computing'
Proceedings of the twenty-second annual symposium on Principles of distributed computing
Tree Parity Machine Rekeying Architectures
IEEE Transactions on Computers
Multilevel Design Validation in a Secure Embedded System
IEEE Transactions on Computers
Encoding-Based Tamper-Resistant Algorithm for Mobile Device Security
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part IV: ICCS 2007
IVEC: off-chip memory integrity protection for both security and reliability
Proceedings of the 37th annual international symposium on Computer architecture
SecBus: operating system controlled hierarchical page-based memory bus protection
Proceedings of the Conference on Design, Automation and Test in Europe
T-DRE: a hardware trusted computing base for direct recording electronic vote machines
Proceedings of the 26th Annual Computer Security Applications Conference
Software-Based copy protection for temporal media during dissemination and playback
ICISC'05 Proceedings of the 8th international conference on Information Security and Cryptology
Use, perceived deterrence and the role of software piracy in video game console adoption
Information Systems Frontiers
PHANTOM: practical oblivious computation in a secure processor
Proceedings of the 2013 ACM SIGSAC conference on Computer & communications security
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This paper discusses the hardware foundations of the cryptosystem employed by the XboxTM video game console from Microsoft. A secret boot block overlay is buried within a system ASIC. This secret boot block decrypts and verifies portions of an external FLASH-type ROM. The presence of the secret boot block is camouflaged by a decoy boot block in the external ROM. The code contained within the secret boot block is transferred to the CPU in the clear over a set of high-speed busses where it can be extracted using simple custom hardware. The paper concludes with recommendations for improving the Xbox security system. One lesson of this study is that the use of a high-performance bus alone is not a sufficient security measure, given the advent of inexpensive rapid prototyping services and affordable high-performance FPGAs.