Designing processor-time optimal systolic configurations

Authors:
O. B. Efremides;M. P. Bekakos
Affiliations:
Department of Informatics, Athens University of Economics and Business, Greece;Department of Electrical & Computer Engineering, Faculty of Engineering, Democritus University of Thrace, Greece
Venue:
Highly parallel computaions
Year:
2001

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Abstract

One of the most challenging problems in systolic processing is the development of a methodology for mapping an algorithm into a systolic architecture. It becomes more and more obvious that systolic arrays can be produced not only using trial and error approaches, but also that they can be mechanically produced through the use of optimal synthetic methods. Herein, a new approach is investigated regarding the synthesis of processor-time optimal systolic arrays. The proposed procedure is based on the dependence method, but nonlinear transformations and the concept of double processing streams for the input data of the algorithm are also used. The result is efficient systolic designs from both aspects, the hardware used and the overall time complexity achieved.