Contention is no obstacle to shared-memory multiprocessing
Communications of the ACM - Special issue on parallelism
A Survey of Some Theoretical Aspects of Multiprocessing
ACM Computing Surveys (CSUR)
Multiprocessor Organization—a Survey
ACM Computing Surveys (CSUR)
Low contention semaphores and ready lists
Communications of the ACM
Monitors: an operating system structuring concept
Communications of the ACM
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Load balancing in homogeneous broadcast distributed systems
Proceedings of the Computer Network Performance Symposium
On the duality of operating system structures
ACM SIGOPS Operating Systems Review
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
The Performance Implications of Thread Management Alternatives for Shared-Memory Multiprocessors
IEEE Transactions on Computers
The performance of multiprogrammed multiprocessor scheduling algorithms
SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Processor-pool-based scheduling for large-scale NUMA multiprocessors
SIGMETRICS '91 Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems
An argument against scalable cache coherency
ACM SIGARCH Computer Architecture News
Scheduling in parallel systems with a hierarchical organization of tasks
ICS '92 Proceedings of the 6th international conference on Supercomputing
A Hierarchical Task Queue Organization for Shared-Memory Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Adaptively Scheduling Parallel Loops in Distributed Shared-Memory Systems
IEEE Transactions on Parallel and Distributed Systems
Trapezoid Self-Scheduling: A Practical Scheduling Scheme for Parallel Compilers
IEEE Transactions on Parallel and Distributed Systems
Using Processor-Cache Affinity Information in Shared-Memory Multiprocessor Scheduling
IEEE Transactions on Parallel and Distributed Systems
Cluster Queue Structure for Shared-Memory Multiprocessor Systems
The Journal of Supercomputing
An Interactive Approach to Timing Accurate PCI-X Simulation
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
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A potential system software bottleneck is demonstrated in designing an efficient process scheduling method for multiprocessor systems with shared-memory communication mechanism. The process scheduling overhead is considered. The main contribution of this work is to find the design tradeoffs between monitor bottleneck due to scheduling overhead and low process utilization due to load imbalancing. Choosing an optimum number of scheduling monitors is the key to resolve the bottlenecks. Because of the excessive number of memory requests generated by the dynamic monitor selection method, the use of the fixed monitor selection method is recommended. An analytic estimation provides a lower bound in determining the optimum number of monitors. Hill-climbing simulation is then used to find the optimum number of monitors.