Modeling concurrency with partial orders
International Journal of Parallel Programming
Introduction to HOL: a theorem proving environment for higher order logic
Introduction to HOL: a theorem proving environment for higher order logic
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Verity—a formal verification program for custom CMOS circuits
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Computer organization and architecture (4th ed.): designing for performance
Computer organization and architecture (4th ed.): designing for performance
Data structures and program design in C++
Data structures and program design in C++
Problem Solving with C++: The Object of Programming
Problem Solving with C++: The Object of Programming
Symbolic Model Checking
Data Structures and Other Objects Using C++
Data Structures and Other Objects Using C++
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
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The high complexity of modern hardware and software systems necessitates the use of formal methods for checking the satisfaction of desired properties and the absence of design flaws. Numerous methods have been developed, and some, such as model checking and the ?-automata approach, have found wide acceptance in the computer industry and have led to the development of powerful verification tools. However, the popularity of these methods has not been firmly established in the Computer Science and Engineering curriculum. This paper presents an approach to integrating current verification research results into a typical, small-college Computer Organization and Architecture course.