Optimization and control of VDD and VTH for low-power, high-speed CMOS design

Authors:
Tadahiro Kuroda
Affiliations:
Keio University, 3-14-1, Hiyoshi, Kohoku-ku, Yokohama, Japan
Venue:
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Year:
2002

Citing 7
Cited 2

Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques

DAC '98 Proceedings of the 35th annual Design Automation Conference
Voltage scheduling problem for dynamically variable voltage processors

ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec

ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Run-time voltage hopping for low-power real-time systems

Proceedings of the 37th Annual Design Automation Conference
Optimization of VDD and VTH for low-power and high speed applications

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
VTCMOS characteristics and its optimum conditions predicted by a compact analytical model

ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Design of High-Performance Microprocessor Circuits

Design of High-Performance Microprocessor Circuits

Temperature-insensitive dual-Vth synthesis for nanometer CMOS technologies under inverse temperature dependence

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect optimization to enhance the performance of subthreshold circuits

Microelectronics Journal

Quantified Score

Hi-index	0.00

Visualization

Abstract

It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.