Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Four-phase micropipeline latch control circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Compiling the language Balsa to delay insensitive hardware
CHDL'97 Proceedings of the IFIP TC10 WG10.5 international conference on Hardware description languages and their applications : specification, modelling, verification and synthesis of microelectronic systems: specification, modelling, verification and synthesis of microelectronic systems
The tangram framework (embedded tutorial): asynchronous circuits for low power
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Implementing asynchronous circuits using a conventional EDA tool-flow
Proceedings of the 39th annual Design Automation Conference
Algorithms for Synthesis and Testing of Asynchronous Circuits
Algorithms for Synthesis and Testing of Asynchronous Circuits
An Asynchronous 2-D Discrete Cosine Transform Chip
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Asynchronous Design Using Commercial HDL Synthesis Tools
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
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In this paper the automated design of an asynchronous DLX microprocessor is presented. The microprocessor has been designed beginning with a standard RTL-like Verilog specification and the Pipefitter design flow has been used to automatically generate both the specification for the direct implementation of the Control Unit and a synthesisable Verilog specification of the Data Path. The architecture of the DLX is locally synchronous and globally asynchronous and the delay elements for the generation of the local clock signal are automatically produced by Pipefitter as well.The following steps of the design flows (i.e., logic synthesis, technology mapping, placement and routing) have been completed using standard tools leading to the final layout of the circuit.The final microprocessor implements all the functionality of a standard DLX (with the exception of the floating point unit) and supports its whole set of instructions.Some considerations on the area occupation of the microcontroller will be presented in the last section of this paper.