Parallel algorithms: for digital image processing, computer vision and neural networks
Parallel algorithms: for digital image processing, computer vision and neural networks
Parallel stereo and motion estimation
Parallel algorithms
Affine analysis of image sequences
Affine analysis of image sequences
The computation of optical flow
ACM Computing Surveys (CSUR)
The local structure of space-variant images
Neural Networks
Dynamic Vergence Using Log-Polar Images
International Journal of Computer Vision
Computer-Aided Hardware-Software Codesign
IEEE Micro
IEEE Transactions on Pattern Analysis and Machine Intelligence
Detecting Motion Independent of the Camera Movement Through a Log-Polar Differential Approach
CAIP '97 Proceedings of the 7th International Conference on Computer Analysis of Images and Patterns
Space Variant Vision and Pipelined Architecture for Time to Impact Computation
CAMP '00 Proceedings of the Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 4 - Volume 4
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This paper describes the design of a reconfigurable architecture for implementing image processing algorithms. This architecture is a pipeline of small identical processing elements that contain a programmable logic device (FPGA) and double port memories. This processing system has been adapted to accelerate the computation of differential algorithms. The log-polar vision selectively reduces the amount of data to be processed and simplifies several vision algorithms, making possible their implementation using few hard-ware resources. The reconfigurable architecture design has been devoted to implementation, and has been employed in an autonomous platform, which has power consumption, size and weight restrictions. Two different vision algorithms have been implemented in the reconfigurable pipeline, for which some experimental results are shown.