Algorithm and Architecture for Logarithm, Exponential, and Powering Computation
IEEE Transactions on Computers
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation
Journal of VLSI Signal Processing Systems
Calculation scheme based on a weighted primitive: application to image processing transforms
EURASIP Journal on Applied Signal Processing
Journal of Signal Processing Systems
Parametric architecture for function calculation improvement
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Mathematical model of stored logic based computation
Mathematical and Computer Modelling: An International Journal
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A high-radix digit-recurrence algorithm for the computation of the logarithm is presented in this paper. Selection by rounding is used in iterations j 驴 2, and selection by table in the first iteration is combined with a restricted digit-set for the second one, in order to guarantee the convergence of the algorithm. A sequential architecture is proposed, and the execution time and hardware requirements of this architecture are estimated, for a target precision of n = 32 bits and a radix r = 256. These estimates are obtained according to a rough model for the delay and area cost of the main logic blocks employed, and show the achievement of a speed-up over 4 regarding a conventional radix-2 implementation with redundant arithmetic.