Computing in Horn clause theories
Computing in Horn clause theories
An algorithm for the allocation of functional units from realistic RT component libraries
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Formal Techniques for Hardware Allocation
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
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Hardware reusability in high-level synthesis is based on the possibility of mapping several operators to the same hardware module. This possibility may dramatically depend on the ability of the design tool to recognize operators that can mapped to a single module. This work presents an uniform framework to formally express the semantics of hardware modules, in order to support transformational hardware allocation based on symbolic reasoning.