Semantics of digital circuits
Computing in Horn clause theories
Computing in Horn clause theories
Cathedral-III: Architecture-driven high-level synthesis for high throughput DSP applications
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
An algorithm for the allocation of functional units from realistic RT component libraries
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Computer Aided Software/Hardware Engineering
Computer Aided Software/Hardware Engineering
Fundamentals of Algebraic Specification I
Fundamentals of Algebraic Specification I
Algebraic Support for Transformational Hardware Allocation
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Matching system and component behaviour in MIMOLA synthesis tools
EURO-DAC '90 Proceedings of the conference on European design automation
Open-ended system for high-level synthesis of flexible signal processors
EURO-DAC '90 Proceedings of the conference on European design automation
Transformation of Equational Specification by Means of Genetic Programming
EuroGP '02 Proceedings of the 5th European Conference on Genetic Programming
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
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Hardware reusability is a key aspect of behavioral synthesis which is mainly based on the possibility of implementing several operators with a single module. This shared use of resources is heavily dependent on the ability of the synthesis tool to identify candidate operators to be merged. Some ideas for the creation of a uniform framework where the semantics of hardware modules can be formally expressed are presented in this paper. The application to hardware allocation through symbolic manipulation is also addressed.