Bit-modular defect/fault-tolerant convolvers

Authors:
L. Dadda;V. Piuri
Affiliations:
-;-
Venue:
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Year:
1995

Citing 3
Cited 0

Design & analysis of fault tolerant digital systems

Design & analysis of fault tolerant digital systems
Error Coding for Arithmetic Processors

Error Coding for Arithmetic Processors
VLSI and Modern Signal Processing

VLSI and Modern Signal Processing

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Abstract

Design of a family of high-throughput modular convolvers is discussed, with particular reference to the defect and fault tolerance issues. The proposed architecture is based on parallel computation for the individual operands' bits with final merging of the partial results. Different degrees of defect/fault tolerance are considered for different production and operational environments. Modularity is exploited to support also functional adaptability.