Programmable active memories: reconfigurable systems come of age
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Memory bandwidth limitations of future microprocessors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Billion-Transistor Architectures
Computer
Optimal Partitioning for FPGA Based Regular Array Implementations
PARELEC '00 Proceedings of the International Conference on Parallel Computing in Electrical Engineering
Reconfigurable architectures for general-purpose computing
Reconfigurable architectures for general-purpose computing
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Although there has been considerable work in the conventional general-purpose processor community on how to tackle an important looming problem, we are not aware of any similar effort for custom computing machines. The aim of this paper is to analyze the state of the art, pose the relevant questions, and indicate a preliminary solution vis a vis the following question: How will Custom Computing Machines face the memory wall?