Error-control coding for computer systems
Error-control coding for computer systems
A Class of Optimal Fixed-Byte Error Protection Codes for Computer Systems
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Optimal Two-Level Unequal Error Control Codes for Computer Systems
IEEE Transactions on Computers
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Error control codes are now successfully applied to computer systems, especially to memory systems. This paper proposes an extended class of unequal error control codes which protects the fixed-byte strongly in computer words from multiple errors. The fixed-byte stores valuable information such as control and address information in computer/communication messages or pointer information in database words. Here, fixed-byte means the clustered information digits in the word whose position is determined in advance. As a simple and practical class of the codes, this paper proposes an extended type of two-level unequal error control codes which has two error control levels in the codeword; one with strong error control function for the fixed-byte, and the other with weak function for the other part of the codeword. The proposed optimal codes are single-bit error correction, double-bit error detection and fixed b-bit byte error correction code, called SEC-DED-FbEC code, and single-bit plus fixed b-bit byte error correction code, called (S+Fb)EC code, which correct single-bit errors and fixed-byte errors occurring simultaneously. For both types of codes, this paper clarifies necessary and sufficient conditions and bounds on code length, and demonstrates a code construction method of the optimal codes and an evaluation of these codes from the perspectives of error correction/detection capability and decoder hardware complexity.