Clustering and linear placement
DAC '72 Proceedings of the 9th Design Automation Workshop
A combined force and cut algorithm for hierarchical VLSI layout
DAC '82 Proceedings of the 19th Design Automation Conference
An intelligent compiler subsystem for a silicon compiler
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Automatic placement a review of current techniques (tutorial session)
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
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A standard cell initial placement strategy has been developed that incorporates characteristics of both the class of algorithms that is constructive in nature (i.e., bottom-up) and the class that utilizes a top-down partitioning scheme. This approach has been pursued recognizing the fact that while both of these types of algorithms exhibit some rather adverse traits both also possess advantageous properties. Specifically, the placement strategy described in this paper incorporates both the simplicity of constructive placement methods and the global connectivity information characteristic of placement schemes involving partitioning. The specified algorithm has been implemented within the microelectronics computer-aided design facility at Sandia National Laboratories.