The Design of an Optimizing Compiler
The Design of an Optimizing Compiler
Global program optimizations.
Adaptive systems for the dynamic run-time optimization of programs.
Adaptive systems for the dynamic run-time optimization of programs.
A computer architecture for the dynamic optimization of high-level language programs
A computer architecture for the dynamic optimization of high-level language programs
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Value locality and load value prediction
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Exceeding the dataflow limit via value prediction
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Low power data processing by elimination of redundant computations
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Proceedings of the 24th annual international symposium on Computer architecture
The predictability of data values
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Dynamic removal of redundant computations
ICS '99 Proceedings of the 13th international conference on Supercomputing
Compiler-directed dynamic computation reuse: rationale and initial results
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Limits of Data Value Predictability
International Journal of Parallel Programming
Silent Stores and Store Value Locality
IEEE Transactions on Computers
Exploiting Value Locality to Exceed the Dataflow Limit
International Journal of Parallel Programming
An efficient static analysis algorithm to detect redundant memory operations
Proceedings of the 2002 workshop on Memory system performance
Cache memories: A tutorial and survey of current research directions
ACM '82 Proceedings of the ACM '82 conference
Load Redundancy Removal through Instruction Reuse
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Balancing Reuse Opportunities and Performance Gains with Subblock Value Reuse
IEEE Transactions on Computers
Early detection and bypassing of trivial operations to improve energy efficiency of processors
Microprocessors & Microsystems
Impact of memory systems on computer architecture and system organization
IBM Systems Journal
Minimal Multi-threading: Finding and Removing Redundant Instructions in Multi-threaded Processors
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
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Programming languages are designed to make programming productive. Computer architectures are designed to make program execution efficient. Although architectures should be designed with programming languages in mind, it may be as inappropriate to make the computer execute the programming language directly it is to make the programmer use machine language. It is the compiler's job to match the programming language and the computer architectures, and therefore making compiler's efficient and easy to write are important design goals of a complete hardware/software system. This paper summerizes research completed in 1980 [5] on a computer architecture, TM, that takes over some of the more burdensome tasks of optimizing compilers for high-level-languages (HLL's), performing these tasks dynamically during the execution of the object program. This is a different approach to making compilers efficient than is commonly taken; more common approaches include devising more efficient optimization algorithms[I], being clever about when to do optimizations [4], and building the compilers semiautomatically [6].