A Unified Associative and von-Neumann Processor EGPP and EGPP Array
Proceedings of the Sagamore Computer Conference on Parallel Processing
Study of multistage SIMD interconnection networks
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
DAP—a distributed array processor
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
On Functional Testing of Array Processors
IEEE Transactions on Computers
Performance analysis of the connection machine
SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Performance Analysis of the Communication Architecture of the Connection Machine
IEEE Transactions on Parallel and Distributed Systems
The effect of VLSI on computer architecture
ACM SIGARCH Computer Architecture News
Multiprocessor hardware: An architectural overview
ACM '80 Proceedings of the ACM 1980 annual conference
Optimal BPC Permutations on a Cube Connected SIMD Computer
IEEE Transactions on Computers
Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources"
IEEE Transactions on Computers
Parallelism and Array Processing
IEEE Transactions on Computers
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The massively parallel processor (MPP) system is designed to process satellite imagery at high rates. A large number (16,384) of processing elements (PE's) are configured in a square array. For optimum performance on operands of arbitrary length, processing is performed in a bit-serial manner. On 8-bit integer data, addition can occur at 6553 million operations per second (MOPS) and multiplication at 1861 MOPS. On 32-bit floating-point data, addition can occur at 430 MOPS and multiplication at 216 MOPS.