The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
Lower Bounds on Merging Networks
Journal of the ACM (JACM)
Merging and Sorting Networks with the Topology of the Omega Network
IEEE Transactions on Computers
The periodic balanced sorting network
Journal of the ACM (JACM)
Optimizing Parallel Bitonic Sort
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
An asymptotic theory for recurrence relations based on minimization and maximization
Theoretical Computer Science
PODC '83 Proceedings of the second annual ACM symposium on Principles of distributed computing
Sorter based permutation units for media-enhanced microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Switch allocator for bufferless network-on-chip routers
Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip
High-accuracy fixed-width modified booth multipliers for lossy applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Several new results which contribute to the understanding of parallel merging networks are presented. First, a simple new explanation of the operation of Batcher's merging networks is offered. This view leads to the derivation of a modified version of Batcher's odd-even (m, n) network which has delay time [log(m+n)]. This is the same delay time as Batcher's bitonic (m, n) network, but it is achieved with substantially fewer comparators. Second, a correspondence is demonstrated between the number of comparators (and the delay time) for such networks and certain properties of binary number systems which have recently been extensively studied. Third, the [log(m + n)] delay time is shown to be optimal for a non-degenerate range of values of m and n.