Register-transfer level digital design automation: The allocation process
DAC '78 Proceedings of the 15th Design Automation Conference
Bridging high-level synthesis to RTL technology libraries
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Functional synthesis using area and delay optimization
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units
Journal of VLSI Signal Processing Systems
Polaris: Polarity propagation algorithm for combinational logic synthesis
DAC '84 Proceedings of the 21st Design Automation Conference
Automated Synthesis of Digital Hardware
IEEE Transactions on Computers
An Abstract Model of Behavior for Hardware Descriptions
IEEE Transactions on Computers
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The logic synthesis step of the CMU-DA system selects modules from a database for use in a digital system. This approach to logic synthesis is described. An experiment using volunteer designers was conducted to calibrate the automated system. The results indicate that the automated system produces designs that are quite close to those expected in the sample population. Design spaces for a relatively large design and two module sets (TTL and CMOS Standard Cells) are illustrated and discussed. A methodology for predicting the bounds of a design space is illustrated and discussed. The system can be used to measure the usefulness of a new module in a module set or to reimplement a design with the modules of a new technology.