Journal of the ACM (JACM)
Communications of the ACM
The structure of the “THE”-multiprogramming system
Communications of the ACM
A loop network for simultaneous transmission of variable-length messages
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
The architecture and system method of DDM1: A recursively structured Data Driven Machine
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
A tagged token dataflow machine for computing small, iterative algorithms
ACM SIGARCH Computer Architecture News
Data-Driven and Demand-Driven Computer Architecture
ACM Computing Surveys (CSUR)
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A recursive computer architecture for VLSI
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
A multi-processor reduction machine for user-defined reduction languages.
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Multiprocessor hardware: An architectural overview
ACM '80 Proceedings of the ACM 1980 annual conference
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A multi-instruction-multi-data stream computer architecture is presented which is aimed at supporting highly concurrent general-purpose computation. The proposed machine is organised as a set of autonomous resources, each having direct access to a common intercommunication medium which is implemented as a rotating ring. The machine language is based on a generalised concept of control which provides an alternative to the data flow organisation for highly concurrent programming. The progress of a concurrent computation is characterised by the flow of packets of work through resources via the ring. This information flow is organised in such a way as to optimise concurrent operation of the resources and to simplify allocation and intercommunication. Initial simulation results are presented to show the feasibility of the architecture.