Self-checking alternating logic: Sequential circuit design

  • Authors:

  • Scott E. Woodard;Gernot Metze

  • Affiliations:

  • -;-

  • Venue:
  • ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
  • Year:
  • 1978

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Abstract

There has been considerable study of the tradeoff between improved reliability and additional hardware. An alternative is to trade speed for improved reliability, as in alternating logic, which is based on the successive execution of a function and its dual. In addition to doubling time, this approach involves an increase in hardware which, however, is generally modest compared to the usual hardware redundancy approaches. This paper will explore recent advances in the design of sequential circuits using self-checking alternating logic.