Interconnection unit for Poly-Processor System: Analysis and design

  • Authors:
  • Seishi Nishikawa;Masasada Sato;Kunio Murakami

  • Affiliations:
  • -;-;-

  • Venue:
  • ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
  • Year:
  • 1978

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Abstract

This paper discusses the design of interconnection modules for a multiprocessor system which consists of many small and functionally specialized processors. It is proposed that the information, i.e. programs, data etc., used in the system should be divided into three categories; private information, command data and shared data, according to the analysis of software simulation results. Private information is stored in a memory provided exclusively for each processor. Command data is transferred directly between processors to initiate a function in other processors. Shared data is stored in a memory shared by several processors. For command data and shared data, two different connection modules are provided; the interprocessor connection module using common bus technique, and the processor-memory connection module using crossbar switch technique. The effects of information partitioning on the performance and cost of the system are analyzed. It is verified that the interprocessor connection module technique is preferable than a few possible alternatives through the design analysis and the implementation of a pilot model system.