Principles of interactive computer graphics (2nd ed.)
Principles of interactive computer graphics (2nd ed.)
A characterization of ten rasterization techniques
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
A language for bitmap manipulation
ACM Transactions on Graphics (TOG)
ACM Transactions on Graphics (TOG)
Vax Station: A General-Purpose Raster Graphics Architecture
ACM Transactions on Graphics (TOG)
The GapiDraw platform: high-performance cross-platform graphics on mobile devices
Proceedings of the 3rd international conference on Mobile and ubiquitous multimedia
Standardized graphics on the IBM personal computer
IBM Systems Journal
A two-dimensional frame buffer processor
EGGH'87 Proceedings of the Second Eurographics conference on Advances in Computer Graphics Hardware
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A frame buffer architecture is presented that reduces the overhead of frame buffer updating by three means. First, the bit-map memory is (x,y) addressable, whereby a string of pixels can be accessed in parallel. Second, the pixel-change operation is performed by hardware in a single read-modify-write cycle. Third, multiple objects in the frame buffer are addressable simultaneously by a set of address registers. The remaining task of generating (x,y) addresses and providing new data can be managed rapidly by current microprocessors or DMA-devices. With a modest expenditure of hardware, this architecture eliminates all the bit-shifting, bit-masking, and bit-manipulation conventionally associated with frame buffer graphics, while retaining the full generality of user-programmable control. The particular implementation described allows raster manipulation at full bit-map memory bandwidth. It can paint a 16×16 pixel character into the frame buffer in 16 microseconds and can modify a 1024×1024 pixel raster in 64 milliseconds.