Design and verification of large-scale computers by using DDL
DAC '79 Proceedings of the 16th Design Automation Conference
Hardware verification.
A logic verifier based on Boolean comparison
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Formal design verification of digital systems
DAC '83 Proceedings of the 20th Design Automation Conference
A formal design verification system based on an automated reasoning system
DAC '84 Proceedings of the 21st Design Automation Conference
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Most existing hardware design verification techniques (logic simulation, symbolic simulation etc.), as well as the design phase, are rather synthetic. This paper discusses an analytic verification technique with examples of its application. This technique employs backward symbolic simuation, or causality tracing, which is carried out from the negation of a proposition which should be verified. Analyticity this technique has, not only makes verification powerful but gives it another feature, design error diagnosis.