Variable size analysis and validation of computation quality

  • Authors:
  • H. Yamashita;H. Yasnura;F. N. Eko;Cao Yun

  • Affiliations:
  • -;-;-;-

  • Venue:
  • HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
  • Year:
  • 2000

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Abstract

Variable size analysis is a technique to analyze the maximum bit length of each variable in a program or an HDL description. In design of an embedded system, the size (bit length) of each variable strongly affects the size of hardware (the width of datapath and the size of memory) and power consumption of the system. In this paper, we discuss practical methods of variable size analysis in combination of the static approach and simulation based dynamic approach. The variable size analysis is also applicable to design of multimedia embedded systems. Quality of computation of the system is determined by the trade-off between quality of output and cost of systems. We also proposed a new design called quality driven design methodology based on the variable size analysis.