Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Low energy memory and register allocation using network flow
DAC '97 Proceedings of the 34th annual Design Automation Conference
Memory modeling for system synthesis
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Memory exploration for low power, embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A power reduction technique with object code merging for application specific embedded processors
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A recursive algorithm for low-power memory partitioning
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A system-level energy minimization approach using datapath width optimization
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Variable size analysis and validation of computation quality
HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
Reducing instruction cache energy consumption using a compiler-based strategy
ACM Transactions on Architecture and Code Optimization (TACO)
Dynamic on-chip memory management for chip multiprocessors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Nonuniform Banking for Reducing Memory Energy Consumption
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Integer linear programming based energy optimization for banked DRAMs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Power-aware RAM mapping for FPGA embedded memory blocks
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Optimal topology exploration for application-specific 3D architectures
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Quality-driven design by bitwidth optimization for video applications
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Customized on-chip memories for embedded chip multiprocessors
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors
ICPADS '06 Proceedings of the 12th International Conference on Parallel and Distributed Systems - Volume 1
ILP-Based energy minimization techniques for banked memories
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A power-driven multiplication instruction-set design method for ASIPs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On-chip memory architecture exploration framework for DSP processor-based embedded system on chip
ACM Transactions on Embedded Computing Systems (TECS)
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This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for application-specific systems, called VAbM technique. It targets the exploitation of both data locality and effective bitwidth of variables to reduce energy consumed by redundant bits. Under constraints of the number of memory banks, the VAbM technique use variable analysis results to perform allocating and assigning on-chip RAM into multiple memory banks, which have different size with different number of word lines and different number of bit lines tailored to each application requirements. Experimental results with several real embedded applications demonstrate significant energy reduction up to 64.8% over monolithic memory, and 18.4% over memory designed by banking technique.