Integration of unicast and multicast scheduling in input-queued packet switches
Computer Networks: The International Journal of Computer and Telecommunications Networking
Multicast support in multi-chip centralized schedulers in Input Queued switches
Computer Networks: The International Journal of Computer and Telecommunications Networking
Performance analysis of large multicast switches with multicast virtual output queues
Computer Communications
Integration of unicast and multicast scheduling in input-queued packet switches
Computer Networks: The International Journal of Computer and Telecommunications Networking
Achieving 100% throughput in a two-stage multicast switch
ICOIN'09 Proceedings of the 23rd international conference on Information Networking
A traffic manager for integrated queuing and scheduling of unicast and multicast IP traffic
ICT'09 Proceedings of the 16th international conference on Telecommunications
Multicast scheduling in feedback-based two stage switch
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
Integrated scheduling algorithm of unicast and multicast for pakect switches implemented with QoS
ASID'09 Proceedings of the 3rd international conference on Anti-Counterfeiting, security, and identification in communication
Efficient multicast support in buffered crossbars using networks on chip
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
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We address the problem of serving multicast traffic in input-queued packet switches. Head-of-line blocking is a major problem in input-queued switches. It can be avoided in unicast switches by maintaining a queue per output port at each input port. This is not feasible in multicast switches, since the number of destination multicast addresses is exponential in the number of output ports. Our approach is to maintain a limited number of input queues for multicast traffic. We solve two key resulting problems: (1.) how to assign incoming packets to queues, and (2.) which packets should be selected to transfer to output queues. Throughheuristic arguments and simulation we show that our architecture leads to significant improvements in switch throughput over the best existing scheduling algorithms. Since modernlinks operate at very high speeds, we take care to ensure that the scheduling algorithm can be implemented efficiently in hardware.