Analysis of nonblocking ATM switches with multiple input queues
IEEE/ACM Transactions on Networking (TON)
An efficient cell-scheduling algorithm for multicast ATM switching systems
IEEE/ACM Transactions on Networking (TON)
Switching and Traffic Theory for Integrated Broadband Networks
Switching and Traffic Theory for Integrated Broadband Networks
Multicast Scheduling for Switches with Multiple Input-Queues
HOTI '02 Proceedings of the 10th Symposium on High Performance Interconnects HOT Interconnects
Design of a Gigabit ATM Switch
INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
Multicast traffic in input-queued switches: optimal scheduling and maximum throughput
IEEE/ACM Transactions on Networking (TON)
Performance analysis of the multiple input-queued packet switch with the restricted rule
IEEE/ACM Transactions on Networking (TON)
Long-Range Dependence: Ten Years of Internet Traffic Modeling
IEEE Internet Computing
An analysis of live streaming workloads on the internet
Proceedings of the 4th ACM SIGCOMM conference on Internet measurement
FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches
IEEE Transactions on Computers
Performance analysis of large multicast switches with multicast virtual output queues
Computer Communications
Hierarchical analysis of RealMedia streaming traffic on an IEEE 802.11b wireless LAN
Computer Communications
Performance of shared-memory switches under multicast bursty traffic
IEEE Journal on Selected Areas in Communications
Multicast scheduling for input-queued switches
IEEE Journal on Selected Areas in Communications
Scalable electronic packet switches
IEEE Journal on Selected Areas in Communications
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The well-known head-of-line blocking compromises the performance of input-queued switches with single first-in-first-out (FIFO) queue per input port. For unicast traffic, the virtual output queueing technique can be used to completely avoid the head-of-line blocking. However, since a multicast packet typically has more than one destination, the exhaustive multicast virtual output queueing is impractical and results in out-of-order delivery. One interesting approach to alleviate the head-of-line blocking is to allocate a certain number of FIFO queues at each input port. In this paper, we theoretically analyze the performance of large multicast packet switches with multiple FIFO queues per input port and gathered traffic. With the gathered-traffic scenario, multicast flows gather among fewer input ports and engage more output ports. A model of Markov chain is proposed in this paper to deduce the probability distribution function of residue size at the beginning of a time slot and analyze the probability that an input port is available after a certain number of iterations' competition for service. The closed-form expressions are deduced for saturation throughput, average service time, and average delay for an MxN switch, where both M and N are assumed to be large numbers. Extensive simulations are preformed to verify the theoretical analysis. Numerical results are studied to compare the performance of multicast switches under different configurations. Our theoretical analysis and simulation studies indicate that (1) a small number of queues (e.g., 10 queues in the cases studied in this paper), which is much less than 2^N-1, are a reasonable choice for the tradeoff between the scheduling overhead and the saturation throughput and delay performances; (2) the saturation and delay performances decrease as the traffic gathers among fewer input ports; (3) the analytical results based on the assumption of large switch size are valid for practical large-sized switches.