Transaction processing performance on PA-RISC commercial Unix systems
COMPCON '92 Proceedings of the thirty-seventh international conference on COMPCON
Characterization of alpha AXP performance using TP and SPEC workloads
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
A new methodology for accurate trace collection and its application to memory hierarchy performance modeling
Contrasting characteristics and cache performance of technical and multi-user commercial workloads
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A national trace collection and distribution resource
ACM SIGARCH Computer Architecture News
Using the BACH trace collection mechanism to characterize the SPEC 2000 integer benchmarks
Workload characterization of emerging computer applications
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The study analyzes the memory hierarchy performance of three SPEC benchmarks and two TPC benchmarks. It finds large differences between the benchmarks in instruction cache miss rates and smaller differences in data cache miss rates. It then breaks all of the miss rates down in their components: context switch misses, user misses, supervisor misses, and collision misses. It demonstrates that context switches contribute little to the miss rates as do collision misses. Finally, using temporal locality graphs, it shows that the inherent locality differences between the reference streams is the main cause of miss rate differences between the various benchmarks.