Bit-level partial evaluation of synchronous circuits
Proceedings of the 2006 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
A consistency architecture for hierarchical shared caches
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
A new class of nature-inspired algorithms for self-adaptive peer-to-peer computing
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
Automatic generation of verified concurrent hardware
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Leap scratchpads: automatic memory and cache management for reconfigurable logic
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
A case for design methodology research in self-* distributed systems
Self-star Properties in Complex Information Systems
Exploiting symmetry and transactions for partial order reduction of rule based specifications
SPIN'06 Proceedings of the 13th international conference on Model Checking Software
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Bluespec has an execution model based on atomic actions.This model is quite different from traditional hardwaredescription languages like Verilog, VHDL and SystemC.Its also different from software languages like C andJava. Bluespec is based on research at MIT in using TermRewriting Systems (TRS) for hardware descriptions and wasdeveloped into an "industrial strength" language and compilerby the Sandburst Corporation. Bluespec, because ofits execution model, strong typing, and object orientation,can raise the level of hardware design significantly withoutcompromising the ability to synthesize efficient hardware.In this talk I will outline how and why Bluespec improvesthe chip design process by giving examples from microprocessorand other complex chips.