Automatic generation of verified concurrent hardware

  • Authors:
  • Marcel Oliveira;Jim Woodcock

  • Affiliations:
  • Departamento de Informática e Matemática Aplicada, UFRN, Brazil;Department of Computer Science, University of York, UK

  • Venue:
  • ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
  • Year:
  • 2007

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Abstract

The complexity inherent to concurrent systems can turn their development into a very complex and error-prone task. The use of formal languages like CSP and tools that support them simplifies considerably the task of developing such systems. This process, however, usually aims at reaching an executable program: a translation between the specification language and a practical programming language is still needed and is usually rather problematic. In this paper we present a translation framework and a tool, csp2hc, that implements it. This framework provides an automatic translation from a subset of CSP to Handel-C, a programming language that is similar to standard C, but whose programs can be converted to produce files to program an FPGA.