Communications of the ACM
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Inside Smalltalk: vol. 1
High-level synthesis for asynchronous system design
High-level synthesis for asynchronous system design
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Advanced Computer Architecture: Parallelism,Scalability,Programmability
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Computer
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The design cycle of the proposed asynchronous multiple functional units networks, from CAD tool coding to post-layout scalability, adheres to the attributes of rapid prototyping. These attributes come in five flavors: OOP style in CAD tools, short design, modify, evaluate and profile cycle at the dataflow graph level, reuse of predesigned components, effective event realization of the asynchronous behavior, and rapid VLSI realization. At the modeling level, a dataflow graph modeling tool specifies and profiles the asynchronous systems rapidly and accurately. At the architectural level, several multiple functional units networks illustrate two rarely addressed issues in asynchronous design: modularity and scalability, which are the keys to rapid prototyping. Networks in a distributor approach and a tournament protocol are presented, where fixed and greedy operand assignment are used respectively. The tournament protocol also leads to a short physical design time and a compact VLSI layout for its regular structure.