Board level fault diagnosis using cellular automata array

Authors:
S. Chattopadhyay;D. R. Chowdhuri;S. Bhattacharjee;P. P. Chaudhuri
Affiliations:
-;-;-;-
Venue:
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Year:
1995

Citing 4
Cited 0

Vector Space Theoretic Analysis of Additive Cellular Automata and its Application for Pseudoexhaustive Test Pattern Generation

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Design of Self-Diagnostic Boards by Multiple Signature Analysis

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Design of CAECC - Cellular Automata Based Error Correcting Code

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CA-Based Byte Error-Correcting Code

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Abstract

A new scheme for board level fault diagnosis based on Cellular Automata Array (CAA) has been presented. In the proposed scheme the output responses of the chips are encoded by applying the encoding strategy of CA based byte error correcting code. The encoded symbols for different test vectors are compressed to a signature. Employing the same decoding structure of byte error correcting code chips are detected as faulty or not. The CAA based design for the fault diagnosis results in a simple and modular structure hence well suited for VLSI implementation.