Synthesis of application-specific multiprocessor systems including memory components
Journal of VLSI Signal Processing Systems - Special issue on application specific array processors (ASAP-92)
A methodology and design tools to support system-level VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
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There is increasing demand for multi-chip implementations of a complex digital system from the consumer market. Although making correct system-level design decisions in the early design stages is a non-trivial task and has farreaching impact on the final quality of the system, this process has not been filly automated. Among many considerations in designing a multi-chip system, reducing the time-to-market is the one of the most critical. In this paper, we present EDEAr, a software package which is based on a mixed integer-linear programming formulation of the multichip system synthesis problem. Our objective is to synthesize system architectures that have minimum prototyping time and satisfy the user-speci$ed cost and timing constraints. We belive EDEN can speed up the system-level design process by helping the designer make early system-level design decisions through its capability to search the vast design space and to visualize feasible system architectures. Experimental results of EDEN on the synthesis of an MPEG description are presented.