Fault Models and Test Procedures for Flash Memory Disturbances
Journal of Electronic Testing: Theory and Applications
Electrical Model For Program Disturb Faults in Non-Volatile Memories
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A P1500-Compatible Programmable BIST Aapproach for the Test of Embedded Flash Memories
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A destructive evolutionary process: a pilot implementation
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Write disturbance modeling and testing for MRAM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
Flash memories can undergo three different types of disturbances, DC-Programming, DC-Erasure, and Drain Disturbance. These faults are specific to flash memories and do not occur in RAMs. In this paper, we discuss these disturbances, their causes, and develop fault models that capture the characteristics of these faults. We present optimal and near optimal algorithms to detect these faults in flash memories.