Satisfying Timing Constraints of Preemptive Real-Time Tasks through Task Layout Technique

  • Authors:
  • Anupam Datta;Sidharth Choudhury;Anupam Basu;Hiroyuki Tomiyama;Nikil Dutt

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
  • Year:
  • 2001

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Abstract

In multi-tasking preemptive real-time systems, a tighter estimate of the Worst Case Response Time(WCRT)s of the tasks can be obtained if the layout of the tasks is taken into account in the analysis. This is because the Cache Related Preemption Delay(CRPD) depends on the inter-task interference in the cache. We present an ILP formulation and an algorithm for generating a layout of the tasks such that the timing constraints of all the tasks are met. An attempt is made to generate a layout such that the CRPD is reduced for all the tasks. The performance of the proposed formulation is demonstrated.