Custom-fit processors: letting applications define architectures
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Hardware-software co-design of embedded reconfigurable architectures
Proceedings of the 37th Annual Design Automation Conference
RaPiD - Reconfigurable Pipelined Datapath
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Interface based hardware/software validation of a system-on-chip
HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
A new, fast, and efficient image codec based on set partitioning in hierarchical trees
IEEE Transactions on Circuits and Systems for Video Technology
Architectures and protocols for mobile computing applications: a reconfigurable approach
Computer Networks: The International Journal of Computer and Telecommunications Networking - QoS in multiservice IP networks
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
An opportunistic reconfiguration strategy for environmentally powered devices
Proceedings of the 3rd conference on Computing frontiers
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With the projected significant growth in mobile internet and multimedia services, there is a strong demand for next-generation appliances capable of wireless image communication. One of the major bottlenecks in enabling wireless image communication is the high energy requirement, which may surpass the current and future capabilities of battery technologies. Past studies have shown that the bottlenecks can be overcome by developing adaptive multimedia compression algorithms which can adapt to dynamic channel conditions and service requirements {tyrh00,taylor01}.In this paper, we present an application-specific hardware/software reconfigurable architecture to support adaptive image compression algorithms. We present a design methodology which considers co-design between adaptive algorithms and architectural design leading to a reconfigurable architecture for image compression algorithms. Co-design of the proposed architecture aims not only at performance and power efficient implementation, but also towards fast and efficient run-time adaptation of an adaptive image compression algorithm. Finally, we present experimental results demonstrating that the proposed architecture provides a low cost (performance, energy) implementation for the adaptive image compression algorithm, and necessary run-time adaptation to current wireless conditions and requirements with very low overhead.