A Novel Architecture for Lifting-Based Discrete Wavelet Transform for JPEG2000 Standard suitable for VLSI implementation

Authors:
Srikar Movva;Srinivasan S.
Affiliations:
-;-
Venue:
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Year:
2003

Citing 6
Cited 1

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JPEG 2000: Image Compression Fundamentals, Standards and Practice

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VLSI Implementation of 2-D DWT/IDWT Cores using 9/7-tap filter banks based on the Non-expansive Symmetric Extension Scheme

ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Discrete wavelet transform: data dependence analysis and synthesisof distributed memory and control array architectures

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Efficient realizations of the discrete and continuous wavelettransforms: from single chip implementations to mappings on SIMD arraycomputers

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A Block-Based Architecture for Lifting Scheme Discrete Wavelet Transform

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

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Abstract

This paper presents a novel architecture for the implementationof a 2-D discrete wavelet transform (DWT) forimage compression. The architecture is designed for liftingbased DWT. The advantages of the lifting based DWTand its inverse, IDWT, over the convolution based schemeare lower computational complexity and reduced memoryrequirements. Hence, the lifting based DWT and IDWT implementationsare faster, consume less power and occupysmaller area compared to the implementations based on theconvolution scheme. Optimum architecture has been arrivedat after conducting a thorough analysis of data inter-dependencies,lifetime and flow. Reduction of scaling coefficientmultiplications has also been effected. CSD arithmetichas been incorporated in the architecture in orderto speed up the implementation. The hardware has beenimplemented for the image blocks of size 9x9 pixels basedon single sample overlap scheme as recommended in theJPEG2000 standard.