SoC Synthesis with Automatic Hardware Software Interface Generation

  • Authors:
  • Amarjeet Singh;Amit Chhabra;Anup Gangwar;Basant K. Dwivedi;M. Balakrishnan;Anshul Kumar

  • Affiliations:
  • -;-;-;-;-;-

  • Venue:
  • VLSID '03 Proceedings of the 16th International Conference on VLSI Design
  • Year:
  • 2003

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Abstract

Design of efficient System-on-Chips (SoCs) require thoroughapplication analysis to identify various compute intensiveparts. These compute intensive parts can be mapped tohardware in order to meet the cost as well as the performanceconstraints. However, faster time to market requiresautomation of synthesis of these code segments of the applicationfrom high level specification such as C alongwithits interfaces. Such synthesis system should be able to generatehardware which is easily plug-gable in various typesof architectures, as well as augment the application code toautomatically take advantage of this new hardware component.In this paper, we address this problem and present an approachfor complete SoC synthesis. We automatically generatesynthesizable VHDL for the compute intensive partof the application alongwith necessary interfaces. Our approachis generic in the sense that it supports various processorsand buses by keeping a generic hardware interfaceon one end and a dedicated one on the other. The generatedhardware can be used in a tightly or loosely coupled mannerin terms of memory and register communication. We presentthe effectiveness of this approach for some commonly usedimage processing spatial filter applications.