Iterative test-point selection for analog circuits

  • Authors:
  • J. Van Spaandonk;T. A. M. Kevenaar

  • Affiliations:
  • -;-

  • Venue:
  • VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
  • Year:
  • 1996

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Abstract

A method is presented which is useful for functional testing of analog circuits. It selects a set of rest points from a large set of candidate test points by combining a well-known decomposition technique from linear algebra with an iterative algorithm. The influence of random measurement errors is taken into account. Examples demonstrate that the method allows the circuit behavior to be determined with high precision, even in the presence of large measurement errors.