Self-Checking Circuits versus Realistic Faults in Very Deep Submicron

Authors:
Lorena Anghel;Michael Nicolaidis;Issam Alzaher-Noufal
Affiliations:
-;-;-
Venue:
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Year:
2000

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Abstract

IC technologies are approaching the ultimate limits of silicon in terms of device size, power supply levels and speed. By approaching these limits, circuits are becoming increasingly sensitive to noise as well as to small manufacturing defects that may result on spurious faults. Such faults are difficult to (or can not) be detected by manufacturing testing and will result on unacceptable rates of errors in the field. Self-checking design can be used to cope with this problem, but usually it addresses logic faults. This paper analyzes the behavior of self-checking circuits under various spurious faults likely to occur in very deep submicron technologies.